Embedded applications are typically developed using a composition of high-level language, e.g., the C programming language, and low-level assembly language. The high level language provides abstraction and portability and is best suited to represent target independent modules of the application. Assembly language is used to develop low level, target dependent functionality, e.g., device drivers, and where optimal processor performance is desired. In such applications, it is common and desirable for the modules written in the high level language and the assembly language modules to share data structures.
The shared data structures may be allocated and optionally initialized by either the high-level language compiler in response to specifications in the high-level language source code or by the assembler in response to specifications in the assembly language source code. In the latter case, the data structures must be created to conform to compiler conventions for alignment of such structures in memory and the memory length of primitive data types. These compiler conventions are based on the memory models supported by the target hardware. For example, the TMS320C55 C compiler available from Texas Instruments Incorporated supports both a small and a large memory model, wherein the length of a data pointer is 16 bits in the small memory model and 23 bits in the large memory model.
Finally, the architecture of the target hardware of the application may impose memory alignment requirements. For example, the architecture may require that all code pointers be located at even word addresses, regardless of the actual length of the pointer. And, the architecture may provide support for both 16-bit data addresses and 23-bit data addresses where a 16-bit data address may be located at either an even or odd word address while a 23-bit data address must be located at an even word address.
Therefore, there are a variety of combinations or sets of memory alignment constraints attributable to differing memory models, compiler alignment constraints, and hardware alignment constraints that may be imposed on a data structure used by both high level language and assembly code. Current approaches to handling these combinatorial factors have significant development and maintenance costs when an embedded application is targeted for multiple architectures with differing memory models. Multiple possible sets of memory alignment constraints are possible in this situation. While the high level language modules can simply be recompiled with a compiler targeted to the desired memory model and hardware architecture, the shared data structures in the assemble language modules must be modified for each new set of memory alignment constraints introduced.
These modifications to support the new architectures will likely involve a significant re-write of the shared data structures. The programmer has to re-analyze the structures in view of the new memory alignment requirements and determine the appropriate alignment and offset of each element. Any changes to the data structures must be made manually by the programmer, creating a potential for the introduction of errors. Also, multiple versions of the data structures are created, posing future maintenance issues.